IC 74LS138 LOGIC DIAGRAM

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Low Power Schottky Logic – 74LS138 - Silicon Supplies
Low Power Schottky Logic – 74LS138. Rev 1.0 . 21/11/17. 3-to-8 Line Decoder / Demultiplexer IC in bare die form . Description . Features: Demultiplexing capability The 74LS138 3-to-8 Line Decoder / Demultiplexer is fabricated on a 2µm 40V Bipolar process. The device decodes 1-of-8 lines, set by x3 binary select inputs & three enable inputs.
Working of 74138 decoder IC - Tutorials Point
Feb 28, 2019Use of 74138 to generate chip select logic: We use the logic of selection to generate signals for chip selection tending to eight chips in a microcomputer system. Let us suppose that there are eight 1K × 8 sized chips of EPROM, where we want the starting of address to be 2000H, 2400H, 2800H, , 3C00H. In the figure below 74138 gets selected[PDF]
SN54/74LS138 1-OF-8 DECODER/ DEMULTIPLEXER
The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/ Demultiplexer. This device is ideally suited for high speed bipolar memory LOGIC DIAGRAM A2 A1 A0 E1 E2 E3 O7 O6 O5 O4 O3 O2 O1 O0 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS IOS Short Circuit Current (Note 1) –20 –100 mA VCC = MAX ICC Power Supply Current 10 mA VCC = MAX